Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates
Abstract:
The following assertions are proved: for each natural k, there exists a basis consisting of Boolean functions on not more than 2k+2 variables (on not more than 4k+2 variables), in which one can implement any Boolean function except the constant 1 by a logic network which is irredundant and allows a fault detection test with a length not exceeding 3 (a diagnostic test with a length not exceeding 4, respectively) under not more than k arbitrary stuck-at faults at inputs and outputs of gates. It is shown that, when considering only arbitrary stuck-at faults at inputs of gates, one can reduce the mentioned bounds on lengths of tests to 2.
Keywords:
logic network, arbitrary stuck-at fault, fault detection test, diagnostic test
Publication language:russian, pages:32
Research direction:
Mathematical modelling in actual problems of science and technics
